Current mode logic (CML) circuits are digital circuits where changes of logic levels are realized by switching currents instead of voltages. In MOS realizations of CML, the transistors used as switching elements are always in the saturation regime but the transistors remain within the active operating regions at all times. Thus, the transistors that are emitter coupled do not have a charge-storage time to content with and can change states very rapidly. An advantage of emitter coupled logic (ECL), or current mode logic (CML) respectively, is that it enables very high speed. However, current mode logic circuits have a relatively high current consumption because current flows through the transistors at all times. Therefore, CML logic circuits are employed where high speed is required, and they are combined with conventional CMOS circuits which operate slower but are less current consuming.
Integrated circuits which utilize differential current mode logic have different voltage ranges with respect to logic high and logic low voltage levels than CMOS technologies. Hence, if CMOS technologies and current mode logic circuits are used in a single integrated circuit a conversion of the current mode logic differential voltage levels into CMOS compatible voltage levels is required.
FIG. 1a shows a typical differential CMOS signal involving two complementary single-ended signals P, N wherein the highest voltage of the signals is usual referenced to the supply voltage VDD and the differential swing is about a few hundred millivolts. In contrast, a typical CMOS circuit operates according to one single-ended voltage within a specified voltage range. FIG. 1b shows a typical single-ended logic signal which has a maximum voltage corresponding to logic 1 and a minimum voltage corresponding to logic 0. Here, the logic high level is referenced to the supply voltage VDD and the logic low level is referenced to ground potential. It is readily understood that a combination of CML and CMOS circuitry in a single integrated circuit requires a conversion of the differential CML signal Vin into a single-ended CMOS signal Vout.
Accordingly, what is needed is a high speed converter for converting a differential input signal to single-ended output signal wherein the converter is robust against changes of temperature and supply voltage, and contains only a few electronic components.